The invention relates generally to a multi-processor bus protocol system utilizing I2C(copyright) bus architecture.
Several bus architectures are known, including the I2C(copyright) multi-master bus interface and architecture developed by Philips Semiconductors. I2C bus protocol is currently device-specific. For example, National Semiconductor manufacturers the LM75 digital temperature sensor, an integrated circuit which provides temperature, delta sigma A/D conversion, and over temperature detection. The LM75 interfaces to the I2C(copyright) bus; and any microprocessor on the I2C bus must utilize a unique protocol defined by National Semiconductor in order to access data from the LM75.
Each I2C bus manufacturer thus creates a unique protocol for its I2C devices. System manufacturersxe2x80x94which incorporate several I2C bus devices within a microprocessor controlled systemxe2x80x94must understand and utilize all relevant protocols for proper system operation, adding cost to the system.
There is therefore a need to provide an I2C bus interface protocol which reduces the complexity and requirements of integrating I2C bus devices into a system. One object of the invention is thus to provide an I2C bus protocol system which alleviates the afore-mentioned difficulties.
At least one other significant limitation exists with the I2C bus interface. Currently, any microprocessor on the I2C bus can be a xe2x80x9cmasterxe2x80x9d when communicating to an I2C bus device. However, with a strict master-slave relationship, processes within a microprocessor on the I2C bus cannot communicate with other processes in other microprocessors. There is therefore a need to provide a system which permits communication between multiple microprocessors, and between separate processes within these microprocessors, on the I2C bus; and another object of the invention is to provide such a system.
A further object of the invention is to provide inter-processor communication on an I2C bus without interfering with fixed protocols established by existing I2C devices connected to the bus.
Other objects of the invention will be apparent from the description which follows.
In one aspect, the invention provides a method for communicating between first and second controllers (including between processes within the controllers, or microprocessors) on an I2C bus. This bus is of the type which transmits data packets that start with a start condition and end with a stop condition, and that includes a destination address followed by a transmission type, a first data byte, a second data byte, and one or more additional data bytes. The method includes the steps of: designating a destination address with a unique bus address (i.e., devAddress) of the second controller; designating the first data byte with a unique bus address (i.e., ownAddress) of the first controller; and specifying the transmission type, wherein the first and second controllers initiate a master-slave relationship for read and write operations between controllers.
In another aspect, the method includes the step of specifying the transmission type, by designating a busControl type, that defines whether the first controller operates as a slave or master. This step can include the further aspect of specifying (a) a master request to initiate the master request as soon as possible or (b) a slave request to initiate the slave request when the first controller specifies matching conduit information.
In another aspect, the method of the invention can include the step of specifying the transmission type by designating an ioRequest that defines whether the transmission is Read, Write, Read/Write or Write/Read.
In still another aspect, the method of the invention includes the step of designating a read by initiating a master-transmit, slave-receive protocol followed by a master-receive, slave-transmit protocol. In a similar aspect, the method can also include the step of designating a read/write by initiating a master-transmit, slave-receive protocol followed by a master-receive, slave-transmit protocol, followed by a master-transmit, slave-receive protocol.
The methods of the invention can also, include the step of designating the second data byte with a tag specifying a process address within the second controller, the tag and address of the first controller defining a conduit between a process in the first controller and a process in the second controller. The step of receiving data from the second controller can include, in another aspect, transmitting a repeated start condition, slave address and transfer direction after formation of the conduit.
In another aspect, the method can include the step of designating one process in the second controller with a reserved tag identifier, to accept conduit communication without a match to an existing request.
Another aspect of the invention includes the step of specifying a tag of zero, wherein the tag and unique address are not transmitted between the first and second controllers.
In yet another aspect, the invention includes the step of designating the bus address of the second controller as a predetermined number to connect with any master without a match to an existing request. Another aspect includes transmitting data from the first controller to the second controller prior to generation of the stop condition.
In accord with one aspect of the invention, the master can talk to an I2C device with standard I2C protocol by specifying a tag of zero. In this case, the ownAddress and tag are not transmitted nor are they expected to be received.
The invention also provides an I2C bus protocol system. The system includes an I2C bus with means for communicating an I2C packet across the bus. First and second controllers connect to the bus, with each controller having (a) means for specifying a devAddress as a slave address in the I2C packet, (b) means for specifying ownAddress as a master address in a first data byte of the I2C packet, and (c) means for specifying a tag within a subsequent data byte of the I2C packet, wherein the first and second controllers initiate a master-slave relationship for read and write operations along a conduit between processes within the controllers.
In another aspect, one or more I2C devices connect to the bus, with each controller having means for communicating with the I2C devices without interfering with communication between the controllers.